1. Field of the Invention
This invention relates to microprocessors and more particularly to addressing techniques for addressing a processor main memory or microcontrol memory.
2. Description of the Prior Art
In digital processing apparatus which is sequentially executing a group of instructions which may be in the form of a program, it is frequently necessary, because of external interrupt or need for repeatable execution of a sub-set of instructions or a subroutine, to branch from the sequential execution of the main program to such a subroutine. When such a branch occurs it is frequently necessary ot lose one complete machine cycle, since a new address must be applied to the program storage means and must at the same time be incremented by one to extract the subsequent instruction from the subroutine.
Further, in executing a program it is frequently necessary because of address field limitations of a processor to provide for indirect addressing whereby an incremental number is added to a instruction address or an operand address to extract the required instruction or operand from a portion of the instruction or data storage device. This incremental number or index value is most commonly stored in an index register which must be updated each time the index is to be modified for execution of a different portion of the program.